Multi-phase On-chip Traffic Generation Environment
نویسندگان
چکیده
In this report, we present a cycle-accurate multi-phase on-chip traffic generation and simulation environment. This environment provides deterministic traffic generation (traces replay) as well as stochastic traffic generation based on statistical analysis of a reference trace. We show that our traffic generators emulate precisely the behavior of processors or ip and that our environment is a versatile tool for network-on-chip prototyping. Simulations are performed in a SystemC-based simulation environment with a mesh network-on-chip
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